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mp1720 2.7w mono class d low-emi high-efficiency audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 1 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the mp1720 is a high efficiency class-d audio amplifier. it utilizes a full bridge output structure capable of delivering 2.7w into 4 ? speaker. this device exhibits the high fidelity of a class ab amplifier with an efficiency of 90% which dramatically reduces solution size by integrating the following: ? 250m ? power mosfets (v in =3.3v) ? startup / shutdown pop elimination ? short circuit /thermal overload protection the mp1720 features a pin-selectable 1mhz or 1.3mhz frequency control or can be synchronized to an external clock source. the flexible switching frequency and internal emi- reduction scheme eliminates the need for an output lc filter and passes emission standards without filter & with considerable cable. the mp1720 has five fixed gain options. mp1720-3: 3db; mp1720-6: 6db; mp1720-9: 9db; mp1720-12: 12db; mp1720-216: 21.6db. the mp1720 is available in 10-pin msop-ep and 10-pin qfn packages. features ? passes fcc-radiated emissions standards with 24inch of cable without output filter ? 2.7w into 4 ? with 5v vin @ 10% thd+n ? up to 90% efficiency ? flexible switching frequency setting ? low noise (53 v typical) with 3.3v vin ? 15ms start-up time eliminates pop ? low quiescent current (4ma @3.3v) ? low shutdown current (0.1 a) ? full bridge output drive ? fully differential input ? short circuit protection ? thermal shutdown applications ? cellular phones ? pdas ? mp3 players ? portable audio all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application mp1720 power supply inp inn dgnd shdn pvin pgnd outp outn clk out - out + cs in+ in- cs cin cin enable vin -10 0 10 20 30 40 50 100 30 300 fcc emi limit frequency (mhz) amplitude (dbuv/m)
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 2 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) mp1720dq-3 6j mp1720dq-6 7j MP1720DQ-9 8j mp1720dq-12 9j mp1720dq-216 qfn10 (3mm x 3mm) 2k mp1720dh-3 1720k mp1720dh-6 1720l mp1720dh-9 1720m mp1720dh-12 1720n mp1720dh-216 msop10ep 1720p -40 ? c to +85 ? c package reference top view vin inp inn dgnd shdn 1 2 3 4 5 pvin outn outp pgnd clk 10 9 8 7 6 exposed pad on backside connect to gnd 1 2 3 4 5 10 9 8 7 6 top view vin inp inn dgnd shdn pvin outn outp pgnd clk exposed pad on backside connect to gnd qfn10 msop10ep absolute maxi mum ratings (1) vin to dgnd...............................................6.0v pvin to pgnd ............................................6.0v dgnd to pgnd ..........................-0.3v to +0.3v pvin to vin .................................-0.3v to +0.3v all other pins to dgnd?.-0.3v to (vin + 0.3v) continuous power dissipation (t a = +25c) (2) qfn10 ....................................................... 2.5w msop10-ep .............................................. 1.2w junction temperature.............................+140c storage temperature range ...-65c to +150c lead temperature (soldering, 10s) ........+260c recommended operating conditions (3) supply voltage vin.........................2.5v to 5.5v operating junct. temp. (t j )..... -40 ? c to +125 ? c thermal resistance (4) ja jc 3x3 qfn10..............................50 ...... 12 ... ? c/w msop10-ep ..........................105 ..... 19 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operation conditions. 4) measured on jesd51-7, 4-layer pcb.
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 3 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics vin = pvin = shdn =3.3v, dgnd = pgnd = 0v, clk = dgnd (f clk =1.0mhz), r load = , r load connected between out+ and out-, t a = +25 ? c, unless otherwise noted. parameter symbol conditions min typ max unit output offset voltage |v os | vs=0v, av=4v/v, v in =2.5v to 5.5v 6 80 mv power supply rejection ratio psrr v in =2.5v to 5.5v -70 db common mode rejection ratio cmrr v in =3.3v, v id =0.05v, v ic =0.6v -66 db v in =5.5v, no load, switching 7 v in =3.3v, no load, switching 4 8 quiescent current i q v in =2.5v, no load, switching 3.5 ma shut down current i ds shdn =0, v in =2.5v to 5.5v 0.1 4 a turn-on time t on 15 ms input equivalent resistance r ine 12 21 k ? mp1720-3 950 995 1035 mp1720-6 900 940 980 mp1720-9 820 860 900 mp1720-12 745 784 825 input bias voltage v bias either input mp1720-216 410 465 530 mv mp1720-3 1.3 1.4 1.5 mp1720-6 1.9 2.0 2.1 mp1720-9 2.7 2.85 3.0 mp1720-12 3.8 4.0 4.2 voltage gain a v mp1720-216 11.4 12.0 12.6 v/v output slew rate sr v in =3.3v 200 v/ s rise/fall time t rise ,t fall 10% to 90% 12 ns clk = gnd 1000 oscillator frequency f osc clk = float 1300 khz clk frequency lock range f clk v in =2.5v to 5.5v 500 1400 khz uvlo 2.25 v v clkh 2.5 clk input thresholds v clkl v in =2.5v to 5.5v 1 v v sdh 1.6 shdn input thresholds v sdl v in =2.5v to 5.5v 0.45 v shdn input leakage current i lkg_shnd shdn =6.3v 0.1 1 a clk input current (5) i lkg_clk vclk = 0v -1.25 10 a notes: 5) clk has an internal 1m ? resistor to vref.
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 4 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation characteristics test set-up graph, vin = pvin = shdn =3.3v, dgnd = pgnd = 0v, clk = dgnd (f clk =1.0mhz), r load = 4 ? , gain=12db, t a = +25 ? c, unless otherwise noted (6) . parameter symbol conditions min typ max unit v in =5.0v 2.14 v in =3.3v 0.87 thd+n=1%, r load =4 ? v in =2.5v 0.48 v in =5.0v 2.78 v in =3.3v 1.18 thd+n=10%, r load =4 ? v in =2.5v 0.64 w v in =5.0v 1.19 v in =3.3v 0.55 thd+n=1%, r load =8 ? v in =2.5v 0.31 v in =5.0v 1.56 v in =3.3v 0.71 output power p out thd+n=10%, r load =8 ? v in =2.5v 0.40 w p out =2w, v in =5.0v 0.15% p out =0.8w v in =3.3v 0.13% total distortion pulse noise thd+n p out =0.4w v in =2.5v 0.13% supply ripple rejection ratio (7) k svr f s =217hz, v ripple =300mv pp , input ac-ground v in =3.3v -60 db signal to noise ratio snr v out =2 v rms a-weighted v in =3.3v 91.3 db no weighting 72 output noise v n v in =3.3v, f s =20hz to 20khz, input ac- grounded a weighting 53 v rms common mode rejection ratio (8) cmrr vic ripple =300mv pp , f s =1khz v in =3.3v -62 db
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 5 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions pin # name description 1 vin analog power supply 2 inp positive differential input 3 inn negative differential input 4 dgnd analog ground 5 shdn shutdown input (drive high to enable the mp1720) 6 clk frequency select and external clock input; clk=gnd: operate frequency f clk =1.0mhz clk=float: operate frequency f clk =1.3mhz clk=clocked: operate frequency f clk =external clock frequency 7 pgnd power ground 8 outp positive btl output 9 outn negative btl output 10 pvin power supply thermal pad must be soldered to a ground on pcb
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 6 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. functional block diagram control logic uvlo shdn 5 power supply vin pvin 1 10 inp inn osc pll frequency select 6 clk logic pvin pvin pgnd pgnd outp outn 8 9 u2 -- + u3 -- + u1 -- + -- + r3 r4 r1 r2 2 3 start up otp ocp pgnd dgnd 74 mp1720 figure 1?mp1720 functional block diagram typical performanc e characteristics test set-up graph mp1720 vin inp inn dgnd shdn pvin pgnd outp outn clk + - measurement output + - measurement input load 1uf 1uf 0.1uf 0.1uf 10uf 15uh 15uh 33nf 33nf 0.15uf 22ohm 22ohm 68nf 68nf notes: 6) the 70khz low-pass filter is required ev en if the analyzer has a low-pass filter. 7) for psrr test, please remove the 10uf decoupling capacitor and just keep the sma ll decoupling capacitors for recovery switch ing currents. 8) cin was shorted for any common-mode input voltage measurement.
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 7 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performance curves vin = pvin = shdn =3.3v, dgnd = pgnd = 0v, clk = dgnd (f clk =1.0mhz), signal frequency f s =1khz, gain=12db, t a = +25 ? c, unless otherwise noted (6,7,8 ) . p out (w) p out (w) p out (w) thd+n (%) frequency response vin=3.3v, p out =100mw frequency (hz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) 60m 4 80m 100m 200m 300m 500m 700m 1 2 3 60m 80m100m 200m 300m 500m 700m 1 2 60m 70m 100m 200m 300m 500m 700m 1 2 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 vin=5v vin=3.3v vin=2.5v vin=5v vin=2.5v vin=3.3v clk=gnd (1.0mhz) clk=ext (1.4mhz) clk=ext (500khz) clk=float (1.3mhz) 20 20k 50 100 200 500 1k 2k 5k 10k 20 20k 50 100 200 500 1k 2k 5k 10k 20 20k 50 100 200 500 1k 2k 5k 10k 20 20k 50 100 200 500 1k 2k 5k 10k 0 . 001 20 0 . 002 0 . 005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 p out =400mw p out =50mw 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 p out =800mw p out =100mw clk=float (1.3mhz) clk=gnd (1.0mhz) clk=ext (1.4mhz) clk=ext (500khz) 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k -10 +4 -8 -6 -4 -2 +0 +2 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k 120 +0 100 80 60 40 20 -7 0 +0 -6 0 -5 0 -4 0 -3 0 -2 0 -1 0
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 8 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performance curves (continued) vin = pvin = shdn =3.3v, dgnd = pgnd = 0v, clk = dgnd (f clk =1.0mhz), signal frequency f s =1khz, gain=12db, t a = +25 ? c, unless otherwise noted (6,7,8) . 700 900 1100 1300 efficiency vs. p out vin=3.3v efficiency vs. p out vin=5v -8 0 +0 -7 0 -6 0 -5 0 -4 0 -3 0 -2 0 -1 0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) 0 10 20 30 40 50 60 70 80 90 100 0 0.4 0.8 1.2 p out (w) p out (w) efficiency(%) 0 10 20 30 40 50 60 70 80 90 100 efficiency(%) 0 0.4 0.8 1.2 1.6 2 2.4 2.8 efficiency vs. clk frequency vin=3.3v, thd+n=1% efficiency vs. clk frequency vin=5v, thd+n=1% 0 10 20 30 40 50 60 70 80 90 100 500 700 900 1100 1300 0 10 20 30 40 50 60 70 80 90 100 500 clk frequency(khz) clk frequency(khz) efficiency(%) efficiency(%) vin(v) shdn 2v/div i load 100ma/div 0 0.5 1 1.5 2 2.5 3 2.5 3.5 4.5 5.5 p out (w) vin(v) 2.5 3.5 4.5 5.5 p out (w) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 thd+n=1% thd+n=1% thd+n=10% thd+n=10% thd+n (%) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 0.5 1 1.5 2 2.5 common mode voltage (v)
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 9 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation the mp1720 is a high efficiency class d audio power amplifier, low cost which can operate well without output lc filter, low emi which can pass fcc-radiated emissions standards with 24inch unshielded twisted-pair-speaker cable without output filter. it has fully differential input and output. and this device can still be used with a single-ended input; but for some noisy environment the mp1720 should be used with differential inputs to ensure maximum noise rejection. mp1720 functional block diagram is shown as figure 1. the amplifier detects the input signal and gets the input differential voltage, which would be combined with the dc bias voltage to generate the complementary voltage. the complementary voltage is compared with the sawtooth waveform. the output of the comparators (u2, u3) would trip when the input magnitude of the sawtooth exceeds the complementary voltage. when no signal is inputted, the output of both comparators are the pulse with a fixed turn on time, and zero output is got from the difference of two channel output (v outp -v outn ). as the larger positive signal is inputted, the output duty of one comparator would be larger while another remains the fixed turn on time or less time, so larger output is got from the difference of two channel output (v outp - v outn ). and there is opposite duty adjustment when the larger negative signal is inputted. clk operating modes the mp1720 offers two kinds of operate frequency solution: internal fixed clock setting or be synchronized to an external clock. allowing the switching frequency to be flexibly adjusted can avoid the frequency or harmonics fall in sensitive frequency bands. 1) internal clock mode the mp1720 have two kinds of internal clock selection. setting clk = dgnd, the switching frequency is 1.0mhz. setting clk = float, the switching frequency is 1.3mhz. 2) external clock mode the mp1720 clk input allows the amplifier to be synchronized to an external ttl clock, which can push the spectral components of the switching harmonics off sensitive frequency bands. this external ttl clock frequency range is very wide and frequency from 0.5mhz to 1.4mhz is recommended. table 1?clk operating modes clk=gnd f clk =1.0mhz clk=float f clk =1.3mhz clk=clocked f clk =external clock frequency input configuration the mp1720 is a mono btl class-d amplifier with differential inputs and outputs, and this device can still be used with a single-ended input 1) differential input for some noisy environment, the mp1720 should be used with differential inputs. the fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. the input coupling capacitors are not required if the design uses a differential source that is biased from 0.2 v to 1.9v (please see tpc: thd+n vs. common mode voltage). although the input coupling capacitor is saved, the low frequency noise would be amplified to the speaker. if the input signal is not biased within the recommended common-mode input range, the input coupling capacitors are needed to pass only the ac audio signal to the input of the amplifier as a high pass filter. 2) single-ended input the mp1720 also can be configured as a single- ended input amplifier. input coupling capacitor is needed to create a high-pass filter with the input resistor and get the low frequency rejection. note: the voltage at each input pin (inp or inn) should be not lower than -0.5v, so the input signal voltage and the maximum output power would be limited, especially for the low gain part. for the high output power applications, the higher gain versions or the differential input is recommended.
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 10 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the peak-to-peak range of limited input voltage on each input pin v limit(pp) can be calculated by the dc bias voltage v bias as the following formula. v limit (pp) = 2* ( v bias +0.5) (1) take the application with input coupling capacitor as an example, the input dc bias voltage v bias on each input pin is set internally (detailed value please see input bias voltage in the ec table). for different gain options, the calculated maximum input signal and the tested maximum output power, with se input or differential input, are shown in the table 2. table 2?maximum input voltage and maximum output power test condition:vin=pvin=5v; 4 ? load. se input differential input part v in _ max (v pp ) p out _max (w) v in _ max (v pp ) p out _max (w) mp1720-3 2.99 0.52 5.98 1.9 mp1720-6 2.88 0.93 5.76 2.7 @ 10% thd+n mp1720-9 2.72 1.74 5.44 2.7 @ 10% thd+n mp1720- 12 2.568 2.62 5.136 2.7 @ 10% thd+n mp1720- 216 1.93 2.7 @ 10% thd+n 3.86 2.7 @ 10% thd+n shutdown function the mp1720 shdn input is a low-active control. to shutdown mp1720, drive shdn low-level voltage. to enable mp1720, drive shdn high- level voltage. shutdown function can place the mp1720 in a low-power (0.1 a) shutdown mode and reduce power consumption and extend battery life. thermal shutdown/ short circuit protection the mp1720 provides internal over thermal protection and short-circuit protection. the amplifier would be disabled to prevent damage to the ic if the junction temperature surpasses +125c. the junction temperature must fall below +112c before normal operation resumes. the currents of both the high-side and low-side mosfets are measured. if the current exceeds an internally preset value, all mosfets will be turned off. after the over thermal or short circuit fault is monitored, the mp1720 remains disabled status for a minimum of 50 s until normal operation resumes. pop suppression after driving shdn pin high, there is a 15ms start-up time to eliminate the startup pop. during this period, an internal circuitry would charges the bias voltages of the device to a certain level to prevent the startup click or pop. and after driving shdn pin low, the all outputs will be set to high impedance immediately
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 11 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. application information component selection the mp1720 uses a minimum number of external components to complete a fully bridged class d audio amplifier. use the following sections to customize the amplifier for your particular application. 1) input coupling capacitors (c in ) the mp1720 is a mono btl class-d amplifier with differential outputs and inputs. if the input signal is not biased within the recommended common-mode input range or if using a single- ended source, the input coupling capacitors are used to pass only the ac audio signal to the input of the amplifier as a high pass filter. choose an input coupling capacitor such that the corner frequency f in is less than the desired pass-band frequency. the formula for the corner frequency is: in in in 1 f 2rc ? ? (2) r in is 15k ? for mp1720. speakers in wireless handsets usually can?t respond well to low frequencies, so for this application the corner frequency can be set to block the low frequencies. the input coupling capacitance is calculated as: in in in 1 c 2rf ? ? (3) if the corner frequency is within the audible band, the capacitors should have a tolerance of 10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. tantalum or aluminum electrolytic capacitor with low-voltage coefficients is recommended, or the largest package ceramics capacitor to minimize voltage coefficient effects, for example x7r dielectrics is better than y5v or z5u. 2) power supply decoupling capacitor (c s ) the class-d audio amplifier requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (thd+n) is low. to carry the higher frequency transient current, spikes, or digital hash on the line, a good low esr ceramic capacitor is necessary. place a 1 f decoupling capacitor as close as possible to the device vcc lead. it is very important for the efficiency of the class-d amplifier, because any resistance or inductance in the trace between the capacitor and the device may cause a loss. a 10 f or greater capacitor placed near the audio power amplifier would also help for filtering lower- frequency noise
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 12 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application circuit differential input mp1720 vin inp inn dgnd shdn pvin pgnd outn outp clk out+ out- enable ext-clock 1.0mhz 1.3mhz 0. 5~1.4mhz 100pf c s 0. 1 10 c s in+ in- figure 2?mp1720 application schematic with differential input (input dc-biased voltage is within the recommended common-mode voltage range) mp1720 vin inp inn dgnd shdn pvin pgnd outn outp clk out+ out- in+ in- ext-clock 1.0mhz 1.3mhz 0.5~1.4mhz enable 100pf 50 1 1 c s 0.1 10 c s c in c in differential input figure 3?mp1720 application schematic with differential input (input dc-biased voltage is out of the recommended common-mode voltage range) mp1720 vin inp inn dgnd shdn pvin pgnd outn outp clk out+ out- se input c in enable c s ext-clock 1.0mhz 1.3mhz 0.5~1.4mhz c in 1 1 0. 1 10 100pf 50 c s figure 4?mp1720 application schematic with single ended input
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier mp1720 rev. 1.01 www.monolithicpower.com 13 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information 3mm x 3mm qfn10 side view top view 1 10 6 5 bottom view 2.90 3.10 1.45 1.75 2.90 3.10 2.25 2.55 0.50 bsc 0.18 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 1.70 0.50 0.25 recommended land pattern 2.90 note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeter max. 4) drawing conforms to jedec mo-229, variation veed-5. 5) drawing is not to scale. pin 1 id see detail a 2.50 0.70 pin 1 id option b r0.20 typ. pin 1 id option a r0.20 typ. detail a 0.30 0.50 pin 1 id index area
mp1720 ? 2.7w low emi high efficiency mono class-d audio amplifier notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp1720 rev. 1.01 www.monolithicpower.com 14 8/9/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. msop-ep

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